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Microchip Technology /ATSAMV71J21 /AFEC0 /IER

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Interpret as IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EOC0)EOC0 0 (EOC1)EOC1 0 (EOC2)EOC2 0 (EOC3)EOC3 0 (EOC4)EOC4 0 (EOC5)EOC5 0 (EOC6)EOC6 0 (EOC7)EOC7 0 (EOC8)EOC8 0 (EOC9)EOC9 0 (EOC10)EOC10 0 (EOC11)EOC11 0 (DRDY)DRDY 0 (GOVRE)GOVRE 0 (COMPE)COMPE 0 (TEMPCHG)TEMPCHG

Description

AFEC Interrupt Enable Register

Fields

EOC0

End of Conversion Interrupt Enable 0
EOC1

End of Conversion Interrupt Enable 1
EOC2

End of Conversion Interrupt Enable 2
EOC3

End of Conversion Interrupt Enable 3
EOC4

End of Conversion Interrupt Enable 4
EOC5

End of Conversion Interrupt Enable 5
EOC6

End of Conversion Interrupt Enable 6
EOC7

End of Conversion Interrupt Enable 7
EOC8

End of Conversion Interrupt Enable 8
EOC9

End of Conversion Interrupt Enable 9
EOC10

End of Conversion Interrupt Enable 10
EOC11

End of Conversion Interrupt Enable 11
DRDY

Data Ready Interrupt Enable
GOVRE

General Overrun Error Interrupt Enable
COMPE

Comparison Event Interrupt Enable
TEMPCHG

Temperature Change Interrupt Enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data